Madiel de Souza Conserva Filho / bts

Cell1_saida_1.386891060788E12.log 617 Bytes
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Checking cspFiles/Cell1.csp

Checking Test(inter(inputs(Cell1),outputs(Cell1)) == {}) [T= ERROR
xtrue
BEGIN TRACE example=0 process=1
error
END TRACE example=0 process=1

Checking HideAll(Cell1) :[divergence free [FD]]
xtrue
BEGIN TRACE example=0 process=0

END TRACE example=0 process=0

Checking Cell1 :[divergence free [FD]]
true

Checking LHS_InputDet(Cell1) [F= RHS_InputDet(Cell1)
true

Checking LHS_OutputDec_A(Cell1) [F= RHS_OutputDec_A(Cell1)
true

Checking LHS_OutputDec_B(Cell1,rd_i.1) [F= RHS_OutputDec_B(Cell1,rd_i.1)
true

Checking LHS_OutputDec_B(Cell1,wrt_i.1) [F= RHS_OutputDec_B(Cell1,wrt_i.1)
true