include "sequence_aux.csp" 
include "function_aux.csp" 
include "auxiliar.csp" 
include "rules.csp"

datatype Direction = req | ack
Value = {0..3}
channel wrt : Direction.Value
channel rd : Direction.Value

Cell = 
  let CellState(val) =
    rd.req?dumb -> rd.ack!val -> CellState(val) [] wrt.req?x -> wrt.ack.x -> CellState(x)
  within
    CellState(0)


GET_CHANNELS(P) =
 	 let f =
 	 < 
 	(Cell, { wrt,rd }) 
 	 > 

 	 within apply(f,P )

inputs(P) = 
 	 let f = 

 	 < 
 	 ( Cell, {| wrt.req, rd.req |}) 
 	 > 

 	 within apply(f, P )

outputs(P) = 
 	 let f =
 	 < 
 	 ( Cell, {| wrt.ack, rd.ack |}) 
 	 >
 	 within apply(f,P)

--Condition A.1: Alphabets are disjont
--assert STOP [T= RUN(inter(events(Cell),events(Cell)))

--Condition A.2: I/O Process
--Condition A.2.1: Every channel in P is an I/O Channel
assert not Test(inter(inputs(Cell),outputs(Cell)) == {}) [T= ERROR

--Condition A.2.2: The contract has infinite set of traces
assert not HideAll(Cell):[divergence free [FD]]

--Condition A.2.3: The contract is divergence-free
assert Cell:[divergence free [FD]]

--Condition A.2.4: The contract is input deterministic
assert LHS_InputDet(Cell) [F= RHS_InputDet(Cell)

--Condition A.2.5: The contract is strong output decisive
assert LHS_OutputDec_A(Cell) [F= RHS_OutputDec_A(Cell)
assert LHS_OutputDec_B(Cell,wrt) [F= RHS_OutputDec_B(Cell,wrt)
assert LHS_OutputDec_B(Cell,rd) [F= RHS_OutputDec_B(Cell,rd)