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BRIC/fdrLog/Cell_saida_1.386879468656E12.log 215 Bytes
eeb5cac08   Madiel de Souza Conserva Filho   first
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  Checking cspFiles/Cell.csp
  
  Checking Test(inter(inputs(Cell),outputs(Cell)) == {}) [T= ERROR
  xtrue
  BEGIN TRACE example=0 process=1
  error
  END TRACE example=0 process=1
  
  Checking HideAll(Cell) :[divergence free [FD]]