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BRIC/cspFiles/RuleInterleaveOfCell1_Cell2.csp
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include "sequence_aux.csp" include "function_aux.csp" include "auxiliar.csp" include "rules.csp" datatype Direction = req | ack Value = {1..3} CellId = {0..3} channel rd : Direction.Value channel wrt : Direction.Value channel write : CellId.Direction.Value channel read : CellId.Direction.Value channel input : Value channel output : Value channel wrt_i : CellId.Direction.Value channel rd_i : CellId.Direction.Value Cell = wrt.req?x -> wrt.ack.x -> rd.req?dumb -> rd.ack!x -> Cell Inst_Cell1 = <(rd,rd_i.1),(wrt,wrt_i.1)> Cell1 = rename(Cell, Inst_Cell1) Inst_Cell2 = <(rd,rd_i.2),(wrt,wrt_i.2)> Cell2 = rename(Cell, Inst_Cell2) GET_CHANNELS(P) = let f = < (Cell1, { rd_i.1,wrt_i.1 }), (Cell2, { rd_i.2,wrt_i.2 }) > within apply(f,P ) inputs( P ) = let f = < ( Cell1, {| rd_i.1.req,wrt_i.1.req |}), ( Cell2, {| rd_i.2.req,wrt_i.2.req |}) > within apply(f, P ) outputs( P ) = let f = < ( Cell1, {| rd_i.1.ack,wrt_i.1.ack |}), ( Cell2, {| rd_i.2.ack,wrt_i.2.ack |}) > within apply(f, P ) --INTERLEAVING COMPOSITION Cell1_Cell2 = INTER(Cell1,Cell2) assert STOP [T= RUN(inter(events(Cell1),events(Cell2))) assert Cell1_Cell2:[deadlock free[FD]] |