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BRIC/cspFiles/RuleInterleaveOfBricRingCell0_BricRingCell1.csp~ 1.35 KB
eeb5cac08   Madiel de Souza Conserva Filho   first
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  include "sequence_aux.csp" 
  include "function_aux.csp" 
  include "auxiliar.csp" 
  include "rules.csp"
  
  
  datatype Direction = req | ack
  Value = {1..3}
  channel rd : Direction.Value
  channel wrt : Direction.Value
  
  
  BricRingCell = wrt.req?x -> wrt.ack.x -> rd.req?dumb -> rd.ack!x -> BricRingCell
  
  
  
  channel rd0 : Direction.Value
  channel wrt0 : Direction.Value
  channel rd1 : Direction.Value
  channel wrt1 : Direction.Value
  
  --Rename1(i) = BricRingCell [[rd <- rd0,wrt <- wrt0]] 
  
  
  --Rename2(i) = BricRingCell [[rd <- rd1,wrt <- wrt1]] 
  Inst_BricRingCell0 = <(rd,rd0),(wrt,wrt0)> 
  BricRingCell0 = rename(BricRingCell, Inst_BricRingCell0) 
  
  Inst_BricRingCell1 = <(rd,rd1),(wrt,wrt1)> 
  BricRingCell1 = rename(BricRingCell, Inst_BricRingCell1) 
  
  
  GET_CHANNELS(P) =
   	 let f =
   	 < 
  	(BricRingCell0, { rd0,wrt0 }),
  
  	(BricRingCell1, { rd1,wrt1 })
  
   	 > 
  
   	 within apply(f,P )
  
  inputs( P ) = 
   	 let f = 
  	<
   	 ( BricRingCell0, {| rd0.req,wrt0.req |}),
   	 ( BricRingCell1, {| rd1.req,wrt1.req |})
   	 > 
  
   	 within apply(f, P )
   outputs( P ) = 
   	 let f =
  	  < 
  	 ( BricRingCell0, {| rd0.ack,wrt0.ack |}),
  	 ( BricRingCell1, {| rd1.ack,wrt1.ack |})
   	 >
   	 within apply(f, P )
  
  --INTERLEAVING COMPOSITION 
  BricRingCell0_BricRingCell1 = INTER(BricRingCell0,BricRingCell1) 
  assert STOP [T= RUN(inter(events(BricRingCell0),events(BricRingCell1)))
  assert BricRingCell0_BricRingCell1:[deadlock free[FD]]